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<head><meta charset="utf-8"><title>branch target alignment question · t-compiler/wg-llvm · Zulip Chat Archive</title></head>
<h2>Stream: <a href="https://rust-lang.github.io/zulip_archive/stream/187780-t-compiler/wg-llvm/index.html">t-compiler/wg-llvm</a></h2>
<h3>Topic: <a href="https://rust-lang.github.io/zulip_archive/stream/187780-t-compiler/wg-llvm/topic/branch.20target.20alignment.20question.html">branch target alignment question</a></h3>

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<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/187780-t-compiler/wg-llvm/topic/branch%20target%20alignment%20question/near/173638513" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> mw <a href="https://rust-lang.github.io/zulip_archive/stream/187780-t-compiler/wg-llvm/topic/branch.20target.20alignment.20question.html#173638513">(Aug 20 2019 at 08:33)</a>:</h4>
<p>I've been asked the following question by someone investigating performance/codegen in Firefox:</p>
<blockquote>
<p>Do you know why rust chooses to align branch targets on 16-byte boundaries, and where in the code this is controlled?</p>
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<p>I don't know the answer but maybe some here does? Any help is appreciated!</p>



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<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/187780-t-compiler/wg-llvm/topic/branch%20target%20alignment%20question/near/173643913" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Hanna Kruppe <a href="https://rust-lang.github.io/zulip_archive/stream/187780-t-compiler/wg-llvm/topic/branch.20target.20alignment.20question.html#173643913">(Aug 20 2019 at 09:59)</a>:</h4>
<p>This has to happen somewhere in the x86 backend (or whatever architecture they're referring to), and rather late at that (around MC emission, probably?). I'm not familiar enough with it to give a more precise answer.</p>



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<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/187780-t-compiler/wg-llvm/topic/branch%20target%20alignment%20question/near/173645405" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Hanna Kruppe <a href="https://rust-lang.github.io/zulip_archive/stream/187780-t-compiler/wg-llvm/topic/branch.20target.20alignment.20question.html#173645405">(Aug 20 2019 at 10:20)</a>:</h4>
<p>I should add for completeness that "happens in the x86 backend" may mean "there is an small hard-to-find hook being overriden somewhere in the target which is used by shared code in lib/CodeGen that actually inserts the padding"</p>



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<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/187780-t-compiler/wg-llvm/topic/branch%20target%20alignment%20question/near/173645434" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> Hanna Kruppe <a href="https://rust-lang.github.io/zulip_archive/stream/187780-t-compiler/wg-llvm/topic/branch.20target.20alignment.20question.html#173645434">(Aug 20 2019 at 10:21)</a>:</h4>
<p>Oh, as for <em>why</em>, general optimization advice from Intel is to align hot jump targets to a cache line</p>



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<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/187780-t-compiler/wg-llvm/topic/branch%20target%20alignment%20question/near/173657511" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> mw <a href="https://rust-lang.github.io/zulip_archive/stream/187780-t-compiler/wg-llvm/topic/branch.20target.20alignment.20question.html#173657511">(Aug 20 2019 at 13:29)</a>:</h4>
<p>Very interesting! Thank you, <span class="user-mention" data-user-id="124289">@rkruppe</span>! I'll pass it on.</p>



<hr><p>Last updated: Aug 07 2021 at 22:04 UTC</p>
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